Method for fabricating a capacitor using a metal insulator metal structure

ABSTRACT

A method for fabricating a capacitor using a metal/insulator/metal (MIM) structure is disclosed. An example method for fabricating a capacitor using an MIM structure including a first metal layer, a dielectric layer, and a second metal layer etches the second metal layer and the dielectric layer in order and changes the etching conditions associated with the second metal layer prior to etching the dielectric layer.

FIELD OF THE DISCLOSURE

[0001] The present disclosure relates to a fabrication method of asemiconductor device and, more particularly, to a method for fabricatinga capacitor using a metal insulator metal structure.

BACKGROUND

[0002] Capacitors used in a semiconductor device are generallyclassified as a PIP (poly/insulator/poly) structure or a MIM(metal/insulator/metal) structure. Use of either of the PIP and MIMstructures is based on the application in which a capacitor is used. TheMIM structure is often used for high frequency semiconductor devices orapplications. This is because in the case of a high frequency deviceundergoing a variation of characteristics due to a RC delay, it ispreferable to employ the MIM structure using metals having superiorelectrical properties.

[0003] Conventional techniques for forming capacitors using the MIMstructure are disclosed in U.S. Pat. Nos. 6,468,858, 5,406,447 and6,597,068.

[0004]FIG. 1 shows a general MIM structure. As shown in FIG. 1, the MIMstructure comprises a first metal layer 11, an insulation line 12 and asecond metal layer 13, which are stacked in order. The first metal layer11 includes two Ti/TiN films and an AlCu film sandwiched between theTi/TiN films, for example. The second metal layer 13 includes one Ti/TiNfilm, for example. The insulation film 12 is located between the firstand second metal layers and is formed of a nitride film, for example.

[0005] A metal reactive ion etching (RIE) process is commonly used tofabricate the capacitor using the above-described MIM structure.However, in this process, nitride residues 14 are roughly or unevenlyformed on a surface of the nitride film.

[0006] The formation of the rough nitride residues 14 is due to the useof a thin nitride film and the inadequacy of process conditions, whichresult in small etching margin and application disability of processconditions prominent in removal capacity of nitride.

[0007] In addition, the rough nitride residues are not removed insubsequent processes as the property of the nitride film is changed in ametal cleaning process. If etching time is increased to remove thenitride residues, a lower layer may be exposed in a plurality oflocations. This causes pattern defects, which is a factor of a patternshort, in a subsequent patterning process. Therefore, there is apractical limit to the amount that the etching time can be increased.

BRIEF DESCRIPTION OF THE DRAWINGS

[0008]FIG. 1 illustrates an MIM capacitor structure formed by a generaletching process.

[0009]FIG. 2 illustrates an MIM capacitor structure when a nitride filmis etched by the example etching process described herein.

[0010]FIG. 3 is a flow chart depicting an example metal reactive ionetching process for forming an even residual nitride film.

DETAILED DESCRIPTION

[0011] The present disclosure describes an example etching process bywhich a surface of nitride residue can be evened or leveled. Thedisclosed method may be used to produce a substantially even (e.g., adesired degree of flatnees) by changing etching conditions of a Ti/TiNfilm as an upper metal layer in a reactive ion etching process andetching conditions of a nitride film as a dielectric line such that onlythe nitride film is effectively removed after the Ti/TiN film iscompletely removed.

[0012]FIG. 2 illustrates an MIM capacitor structure when a nitride filmis etched by the example etching process described in greater detailherein. As shown in FIG. 2, a first metal layer 21, a dielectric layer22 and a second metal layer 23 are sequentially stacked to form acapacitor in an MIM structure.

[0013] The first metal layer 21 includes two Ti/TiN films and an AlCufilm sandwiched between them, for example. The second metal layer 23includes one Ti/TiN film, for example.

[0014] The dielectric layer 22 functioning as a capacitor is made ofnitride and is located between the first and second metal layers 21 and23.

[0015] As shown in FIG. 2, a residual film 24 of the dielectric layer 22formed by the example etching process described herein has asubstantially even or flat.

[0016]FIG. 3 is a flow chart illustrating a metal RIE process forforming a residual even nitride film. As shown in FIG. 3, a process foretching the dielectric layer in the MIM structure is performed in orderof first metal layer deposition (S31), dielectric layer deposition(S32), second metal layer deposition (S33), photoresist film patterning(S34), second metal layer etching (S35) and dielectric layer etching(S36).

[0017] First, Ti/TiN, AlCu and Ti/TiN stacking metal layerscorresponding to the first metal layer are deposited at a thickness ofabout 5,000 Å, using a sputtering process or the like.

[0018] Next, the nitride film (PE-SiN), which is the dielectric layerfunctioning as the capacitor, is deposited at a thickness of about 600Å. Here, the thickness of the dielectric layer need not be limited as600 Å, but instead may be 400 to 800 Å.

[0019] Next, Ti/TiN film as the second metal layer is formed on the topof the nitride film, with Ti and TiN deposited at thicknesses of 500 Åand 1500 Å, respectively. At this time, the thicknesses of Ti and TiNneed not be limited to the above-mentioned values, but the thickness ofTi can be 300 to 700 Å, the thickness of TiN can be 1300 to 1700 Å, and,consequently, a total thickness of the second metal layer can be 1600 to2400 Å.

[0020] Next, after a photoresist film is applied at a thickness of11,000 to 15,000 Å on the top of the second metal layer, a photoresistpattern is formed by selectively etching the photoresist film.

[0021] Next, using the photoresist pattern as a mask, a metal RIE isperformed under the following conditions. First, as etching conditionsof Ti/TiN as the second metal layer, a source of 8 mT/900W and a biaspower of 150w are used and a plasma of a mixture of 50Cl₂/10CHF₃/50Ar isapplied as a reactive gas. The second metal layer is etched for about 45to 55 seconds, preferably, about 50 seconds.

[0022] In this step, it is important to remove nitride residues usingCHF₃. Although the etching process for the second metal layer isperformed by Cl₂, CHF₃ is additionally used to protect a side wall ofTi/TiN film and remove nitride interfacing with Ti to some degree, andAr is used to improve uniformity.

[0023] When the etching for Ti/TiN as the second metal layer iscompleted, the etching conditions for the nitride film is changed to asource of 8 mT/900W, a bias power of 150W and a reactive gas of50Cl₂/100Ar. The nitride film is etched for about 4.5 to 8 seconds,preferably, about 6 seconds

[0024] In this step, residual metal is removed using Cl₂ without usingCHF₃. This is because the MIM characteristic is deteriorated due to anover-etching of the nitride film if the CHF₃ is used in this step. Inaddition, in this step, a ratio of Cl₂ to Ar is 1:2.

[0025] This allows effective removal of metal residues and improvementof uniformity. On the other hand, time required for this step is set as10 to 15% of the etching time of the upper metal layer. This is the mostpertinent time in considerations of a pertinent thickness of residualnitride and the removal of the metal residues. On the other hand, a biaspower used for the etching is set as more than 150W.

[0026] According to the above-described etching process, the nitridefilm can be evenly etched, which results in improvement of the MIMcharacteristic, increased stability of processes in a metal etching, andincreased process margin for subsequent processes.

[0027] As set forth in the above-described examples, a method forfabricating a capacitor in an MIM (metal/insulator/metal) structureincludes a first metal layer, a dielectric layer, and a second metallayer wherein the second metal layer and the dielectric layer are etchedin order, and etching conditions of the second metal layer are differentfrom those of the dielectric layer.

[0028] Preferably, the second metal layer and the dielectric layer areetched by an RIE (reactive ion etching) process.

[0029] Preferably, the dielectric layer remains when the dielectriclayer is etched, and a surface of the remaining dielectric layer iseven.

[0030] Preferably, in the step of etching the second metal layer, thesecond metal layer is etched using a mixture gas consisting of Cl₂, CHF₃and Ar, and, in the step of etching the dielectric layer, the dielectriclayer is etched using a mixture gas consisting of Cl₂ and Ar.

[0031] Preferably, the second metal layer includes Ti and TiN stacked inorder, a thickness of Ti is 300 to 700 Å, a thickness of TiN is 1300 to1700 Å, consequently, a total thickness of the second metal layer is1600 to 2400 Å.

[0032] Preferably, the dielectric layer is made of nitride and athickness of the dielectric layer is 400 to 800 Å.

[0033] Preferably, the first metal layer comprises a first Ti/TiNstacking structure, an AlCu layer, a second Ti/TiN stacking structure,which are formed in order.

[0034] Preferably, in the step of etching the second metal layer, thesecond metal layer is etched for 45 to 55 seconds using a mixture gasconsisting of Cl₂, CHF₃ and Ar in the ratio of 5:1:5, a plasma isgenerated under the conditions of a pressure of 8 mTorr and anapplication power of 900W, and a bias power of more than 150W isapplied.

[0035] Preferably, in the step of etching the dielectric layer, thedielectric layer is etched for 10 to 15% of the etching time of thesecond metal layer, for example, 4.5 to 8 second, using a mixture gasconsisting of Cl₂ and Ar in the ratio of 1 to 2.

[0036] Preferably, in the step of etching the dielectric layer, a plasmais generated under the conditions of a pressure of 8 mTorr and anapplication power of 900W and a bias power of more than 150W is applied.

[0037] Preferably, before the second metal layer is etched, aphotoresist pattern is formed on the second metal layer, the secondmetal layer and the dielectric layer are etched using the photoresistpattern as a mask. In addition, preferably, a thickness of thephotoresist pattern is 11,000 to 15,000 Å.

[0038] Preferably, in the steps of etching the second metal layer andthe dielectric layer, the same bias power is applied.

[0039] Although example embodiments have been described in detail, itshould be clearly understood that this patent covers all methods,apparatus and articles of manufacture fairly falling within the scope ofthe appended claims either literally or under the doctrine ofequivalents.

What is claimed is:
 1. A method for fabricating a capacitor in ametal/insulator/metal structure including a first metal layer, adielectric layer, and a second metal layer, the method comprising:etching the second metal layer and the dielectric layer in order; andchanging the etching conditions associated with the second metal layerprior to etching the dielectric layer.
 2. The method of claim 1, whereinetching the second metal layer and the dielectric layer comprises usinga reactive ion etching process.
 3. The method of claim 1, wherein thedielectric layer remains following the etching of the dielectric layer.4. The method of claim 3, wherein a surface of the remaining dielectriclayer is even.
 5. The method of claim 1, wherein, etching the secondmetal layer includes etching using a mixture gas consisting of Cl₂, CHF₃and Ar, and wherein etching the dielectric layer includes etching usinga mixture gas consisting of Cl₂ and Ar.
 6. The method of claim 1,wherein the second metal layer includes Ti and TiN stacked in order. 7.The method of claim 6, wherein a thickness of the Ti is 300 to 700 Å anda thickness of the TiN is 1300 to 1700 Å.
 8. The method of claim 1,wherein a total thickness of the second metal layer is 1600 to 2400 Å.9. The method of claim 1, wherein the dielectric layer is made ofnitride.
 10. The method of claim 1, wherein a thickness of thedielectric layer is 400 to 800 Å.
 11. The method of claim 1, wherein thefirst metal layer comprises a first Ti/TiN stacking structure, an AlCulayer and a second Ti/TiN stacking structure, which are formed in order.12. The method of claim 1, wherein etching the second metal layercomprises using a mixture gas consisting of Cl₂, CHF₃ and Ar in theratio of 5:1:5.
 13. The method of claim 1, wherein, etching the secondmetal layer comprises etching the second metal layer for 45 to 55seconds
 14. The method of claim 1, wherein etching the second metallayer comprises generating a plasma at a pressure of 8 mTorr and a powerof 900W and applying a bias power of more than 150W.
 15. The method ofclaim 1, wherein etching the dielectric layer comprises using a mixturegas consisting of Cl₂ and Ar in the ratio of 1 to
 2. 16. The method ofclaim 1, wherein an etching time associated with the dielectric layer isbetween about 10 to 15% of an etching time associated with the secondmetal layer
 17. The method of claim 1, wherein etching the dielectriclayer comprises etching the dielectric layer for 4.5 to 8 seconds. 18.The method of claim 1, wherein etching the dielectric layer comprisesgenerating a plasma is generated under a pressure of 8 mTorr and anapplication power of 900W and applying a bias power of more than 150W.19. The method of claim 1, wherein, before the second metal layer isetched, a photoresist pattern is formed on the second metal layer, andthe second metal layer and the dielectric layer are etched using thephotoresist pattern as a mask.
 20. The method of claim 1, wherein athickness of the photoresist pattern is 11,000 to 15,000 Å.